Stu's Rusty Bucket

Thursday, July 31, 2008

BATS

So SmartFirmware starts up in virtual mode, and its memory is mapped back to itself, anyway, its handy to know.
User and Supervisor both have Read/Write access currently. Not sure why we have data mapped at 0x80000000.

IBAT1+DBAT0 corresponds to the MBAR. Maybe the data in DBAT3 is where the x86 video card is residing, its a common PCI memory space address…

The rest of the bats were full of junk and marked no-access more or less.

(BAT’s dump after the jump)

ibat0  00001FFF:00000012 covers 256mb from address 0x00000000 to 0x0FFFFFFF, mapped to 0x00000000 to 0x0FFFFFFF USM RW
ibat1  F0001FFF:F0000012 covers 256mb from address 0xF0000000 to 0xFFFFFFFF, mapped to 0xF0000000 to 0xFFFFFFFF USM RW

dbat0  F0001FFF:F000002A covers 256mb from address 0xF0000000 to 0xFFFFFFFF, mapped to 0xF0000000 to 0xFFFFFFFF USGI RW
dbat1  80001FFF:8000002A covers 256mb from address 0x80000000 to 0x8FFFFFFF, mapped to 0x80000000 to 0x8FFFFFFF USGI RW
dbat2  00001FFF:00000012 covers 256mb from address 0x00000000 to 0x0FFFFFFF, mapped to 0x00000000 to 0x0FFFFFFF USM RW
dbat3  C0001FFF:C000002A covers 256mb from address 0xC0000000 to 0xCFFFFFFF, mapped to 0xC0000000 to 0xCFFFFFFF USGI RW

Monday, July 28, 2008

Grins and Giggles

Just for grins and giggles, I’ve dumped the firmware tree, in order to help me find things… see below the jump

+--> #address-cells
+--> #size-cells
+--> device_type
+--> model
+--> revision
+--> CODEGEN,vendor
+--> CODEGEN,board
+--> CODEGEN,description
+--> openprom (+)
|    +--> CodeGen-copyright
|    +--> bplan-copyright
|    +--> SmartFirmware-version
|    +--> model
|    +--> relative-addressing
|    +--> built-on
|    +--> client-services (+)
+--> aliases (+)
|    +--> ide
|    +--> hd
|    +--> eth
|    +--> screen
+--> options (+)
|    +--> ac-back-behaviour
|    +--> security-password
|    +--> security-#badlogins
|    +--> security-mode
|    +--> fcode-debug?
|    +--> load-base
|    +--> virt-size
|    +--> virt-base
|    +--> real-size
|    +--> real-base
|    +--> real-mode?
|    +--> little-endian?
|    +--> inverse-video?
|    +--> oem-banner
|    +--> oem-banner?
|    +--> oem-logo?
|    +--> screen-#rows
|    +--> screen-#columns
|    +--> output-device
|    +--> input-device
|    +--> use-nvramrc?
|    +--> nvramrc
|    +--> client-ip
|    +--> server-ip
|    +--> secondary-diag?
|    +--> use-argv[0]?
|    +--> usb-enable?
|    +--> fb-mode
|    +--> diag-switch?
|    +--> diag-file
|    +--> diag-device
|    +--> boot-protocol
|    +--> boot-device
|    +--> boot-file
|    +--> boot-command
|    +--> auto-boot-timeout
|    +--> auto-boot?
+--> packages (+)
|    +--> terminal-emulator (+)
|    |    +--> iso6429-1983-colors
|    +--> deblocker (+)
|    +--> disk-label (+)
|    +--> obp-tftp (+)
+--> chosen (+)
|    +--> stdin
|    +--> stdout
|    +--> bootpath
|    +--> bootargs
|    +--> memory
|    +--> mmu
|    +--> bootreply-packet
+--> memory (+)
|    +--> device_type
|    +--> reg
|    +--> available
+--> cpus (+)
|    +--> #size-cells
|    +--> #address-cells
|    +--> #cpus
|    +--> PowerPC,G2 (+)
|    |    +--> device_type
|    |    +--> reg
|    |    +--> cpu-version
|    |    +--> clock-frequency
|    |    +--> bus-frequency
|    |    +--> timebase-frequency
|    |    +--> reservation-granule-size
|    |    +--> state
|    |    +--> tlb-size
|    |    +--> tlb-sets
|    |    +--> tlb-split
|    |    +--> d-tlb-size
|    |    +--> d-tlb-sets
|    |    +--> i-tlb-size
|    |    +--> i-tlb-sets
|    |    +--> i-cache-line-size
|    |    +--> i-cache-block-size
|    |    +--> i-cache-size
|    |    +--> i-cache-sets
|    |    +--> d-cache-line-size
|    |    +--> d-cache-block-size
|    |    +--> d-cache-size
|    |    +--> d-cache-sets
|    |    +--> available
|    |    +--> existing
|    |    +--> translations
+--> rtas (+)
|    +--> rtas-version
|    +--> rtas-size
|    +--> rtas-display-device
|    +--> rtas-event-scan-rate
|    +--> rtas-error-log-max
|    +--> restart-rtas
|    +--> nvram-fetch
|    +--> nvram-store
|    +--> get-time-of-day
|    +--> set-time-of-day
|    +--> set-time-for-power-on
|    +--> event-scan
|    +--> check-execption
|    +--> read-pci-config
|    +--> write-pci-config
|    +--> display-character
|    +--> set-indicator
|    +--> power-off
|    +--> suspend
|    +--> hibernate
|    +--> system-reboot
|    +--> aros,rtas-base
|    +--> aros,rtas-entry
+--> failsafe (+)
|    +--> device_type
+--> builtin (+)
|    +--> .description
|    +--> device_type
|    +--> model
|    +--> bus-frequency
|    +--> #address-cells
|    +--> #size-cells
|    +--> ranges
|    +--> reg
|    +--> compatible
|    +--> #interupt-cells
|    +--> interrupt-parent
|    +--> pic (+)
|    |    +--> device_type
|    |    +--> interrupt-controller
|    |    +--> #interrupt-cells
|    |    +--> .description
|    |    +--> model
|    |    +--> compatible
|    |    +--> reg
|    +--> bestcomm (+)
|    |    +--> device_type
|    |    +--> .description
|    |    +--> model
|    |    +--> compatible
|    |    +--> interrupts
|    |    +--> reg
|    |    +--> bestcomm_tasktable
|    +--> sram (+)
|    |    +--> device_type
|    |    +--> .description
|    |    +--> model
|    |    +--> compatible
|    |    +--> reg
|    |    +--> available
|    +--> ata (+)
|    |    +--> device_type
|    |    +--> .description
|    |    +--> model
|    |    +--> compatible
|    |    +--> interrupts
|    |    +--> reg
|    |    +--> disk (+)
|    |    |    +--> device_type
|    |    |    +--> reg
|    |    |    +--> ata
|    |    +--> bestcomm-task (+)
|    |    |    +--> device_type
|    |    |    +--> .description
|    |    |    +--> taskid
|    |    |    +--> revision
|    |    |    +--> interrupts
|    +--> usb (+)
|    |    +--> .description
|    |    +--> interrupts
|    |    +--> reg
|    |    +--> model
|    |    +--> compatible
|    |    +--> device_type
|    |    +--> #address-cells
|    |    +--> #size-cells
|    +--> ethernet (+)
|    |    +--> device_type
|    |    +--> .description
|    |    +--> local-mac-address
|    |    +--> mac-address
|    |    +--> address-bits
|    |    +--> max-frame-size
|    |    +--> model
|    |    +--> compatible
|    |    +--> interrupts
|    |    +--> reg
|    |    +--> bestcomm-rxtask (+)
|    |    |    +--> device_type
|    |    |    +--> .description
|    |    |    +--> taskid
|    |    |    +--> revision
|    |    |    +--> interrupts
|    |    +--> bestcomm-txtask (+)
|    |    |    +--> device_type
|    |    |    +--> .description
|    |    |    +--> taskid
|    |    |    +--> revision
|    |    |    +--> interrupts
|    +--> sound (+)
|    |    +--> device_type
|    |    +--> .description
|    |    +--> model
|    |    +--> compatible
|    |    +--> interrupts
|    |    +--> reg
|    |    +--> bestcomm-rxtask (+)
|    |    |    +--> device_type
|    |    |    +--> .description
|    |    |    +--> taskid
|    |    |    +--> revision
|    |    |    +--> interrupts
|    |    +--> bestcomm-txtask (+)
|    |    |    +--> device_type
|    |    |    +--> .description
|    |    |    +--> taskid
|    |    |    +--> revision
|    |    |    +--> interrupts
|    +--> serial (+)
|    |    +--> device_type
|    |    +--> .description
|    |    +--> model
|    |    +--> compatible
|    |    +--> interrupts
|    |    +--> reg
|    +--> pcidma (+)
|    |    +--> device_type
|    |    +--> .description
|    |    +--> model
|    |    +--> compatible
|    |    +--> interrupts
|    |    +--> reg
|    |    +--> bestcomm-txtask (+)
|    |    |    +--> device_type
|    |    |    +--> .description
|    |    |    +--> taskid
|    |    |    +--> revision
|    |    |    +--> interrupts
+--> pci (+)
|    +--> device_type
|    +--> #address-cells
|    +--> #size-cells
|    +--> clock-frequency
|    +--> ranges
|    +--> reg
|    +--> #interrupt-cells
|    +--> interrupt-map-mask
|    +--> bus-range
|    +--> interrupt-map
|    +--> display (+)
|    |    +--> vendor-id
|    |    +--> device-id
|    |    +--> revision-id
|    |    +--> class-code
|    |    +--> subsystem-id
|    |    +--> subsystem-vendor-id
|    |    +--> .vendor-name
|    |    +--> .class
|    |    +--> .subclass
|    |    +--> .progif
|    |    +--> interrupts
|    |    +--> devsel-speed
|    |    +--> 66mhz-capable
|    |    +--> fast-back-to-back
|    |    +--> min-grant
|    |    +--> max-latency
|    |    +--> cache-line-size
|    |    +--> reg
|    |    +--> device_type
|    |    +--> rom
|    |    +--> assigned-addresses
|    +--> display (+)
|    |    +--> vendor-id
|    |    +--> device-id
|    |    +--> revision-id
|    |    +--> class-code
|    |    +--> subsystem-id
|    |    +--> subsystem-vendor-id
|    |    +--> .vendor-name
|    |    +--> .class
|    |    +--> .subclass
|    |    +--> devsel-speed
|    |    +--> 66mhz-capable
|    |    +--> fast-back-to-back
|    |    +--> min-grant
|    |    +--> max-latency
|    |    +--> cache-line-size
|    |    +--> reg
|    |    +--> assigned-addresses

Not a huge achievement but its a step

Right now I’m trying to fully parse the device tree so I can leave OF and jump into AROS.
The next step is to write the MPC5200 SOC drivers AROS needs (scheduler, mmu, timer, etc)

(The relevant bit is at the bottom of the boot message)

EFIKA 5K2 Boot Strap [RELEASE BUILD] (c) 2002-2007 bplan GmbH (BUILD 20070122 84240)
Running on    CPU PVR: 0x80822014
Running on system SVR: 0x80110022
BIOS Code position: 0xFFF040D0
Setup System Config…                                                 Done.
Setup Memory Config…                                                 Done.
Setup PCI…                                                           Done.
Setup ATA…                                                           Done.
Setup USB…                                                           Done.
Setup ETH…                                                           Done.
Setup AC97…                                                          Done.
Testing 08000000 Bytes, Pass: 00000000 Failed: 00000000
RAM TEST (fill random)…                                              Done.
cpu0: PowerPC,G2 CPUClock 396 Mhz BUSClock 132 Mhz (Version 0x8082,0x2014)
channel 0 unit 0 :   ata | ST920217A                                | 3.01    
ATA device not present or not responding
EMULATION INT HANDLER ENTERED WITH:
INT NO: 15

EAX=0003 EBX=1111 ECX=2222 EDX=3333 ESP=0000 EBP=5555 ESI=6666 EDI=7777
 AX=4E08  BX=C405  CX=0003  DX=102A  SP=6C1C  BP=5555  SI=5C6B  DI=7777
 DS=C000  ES=BAD0  SS=C000  CS=F000  IP=FE15   NV UP -- PL ZR NA PE NC
CS:IP = F4   FS=BAD4  GS=BAD5C4CA C000 0244 3000 0000 01B4 ABD5 0200 
UNHANDLED INT 10 FUNCTION 0007 WITHIN EMULATION
VM using 1657003 x86 cycles for GFX init
Welcome to SmartFirmware(tm) for bplan EFIKA5K2
Version 1.3 (20070122084838)
SmartFirmware(tm) Copyright 1996-2001 by CodeGen, Inc.
All Rights Reserved.
Pegasos BIOS Extensions Copyright 2001-2007 by bplan GmbH.
All Rights Reserved.
ok boot eth:0192.168.0.102 loader

** EFIKA Init **
BOARD : EFIKA5K2, revision 2B3
OpenFirmware : 1.3, 20070122
CPU : Version 0x8082 (Revision 0x2014), v2.2, 396 MHz (Bus 132 MHz) 
MBAR is at 0xF0000000
scanning memory:
    block 0 - 131072kb at 0x00000000
    block 1 - 16kb at 0xF0008000
Memory : 128MB
RTAS : base 0x7ffb000, entry 0x7ffb000, size=0x43bc


** OUT **

Saturday, July 26, 2008

PowerPC Assembly

So I’m slowly getting my head around PPC assembly. Its not too dissimilar to x86 (in the backwardness), but ugh, loading things in high/low combinations.  erugh.

Anyway, IEEE 1275 Open Firmware specs dictate what the register state be on load, so I’m hoping thats what the efika will present me.

The sooner I can get out of the assembler bootstrap and back into the C bootstrap the better … Will see if the MBAR is at 0x80000000 or not like reset say it supposed to be…

Wednesday, July 23, 2008

bootup.. not.. down..

Well we have a compiled bootloader but it doesnt yet properly talk OF/PROM. I think the biggest reason is I did not specify a start routine and just linked it to a binary.

Its a start, I hope soon to at least have some kind of brnigup on the bootloader.

Sunday, July 20, 2008

Lets start work

So, now I have a half decent tool chain, its time to start working on

make kernel-bootloader-efika-ppc

The first build issue is its looking for a proto/kernel.h

I know WHERE its looking for it… Only that its generated, in the sense that the AROS build system copies it from who knows where or pre-generates it from some other file..

Finding where it comes from is the damn hard part.

Saturday, July 19, 2008

MorphOS 2.0

I booted up the morph os 2.0 demo to see what it was like.

First boot up, I had all the files on an EXT2 partition on my usb stick, OF booted MorphOS but then MorphOS couldnt read it to see the iso image..

Second time I tried to install it, it installed into the same directory on the USB stick as the iso image, ignorning the HD0 line.. The the timer kicked in and slowed it down to a crawl.

Third time, I got it installed onto my HD, I was using the boot SYSTEM HD0 partition as SFS with 1kb block sizes, which I guess the OF didnt like as it wouldnt see anything on the disk and boot it.

Fourth time around I changed the boot HD0 to 512b SFS and now the OF can see it and boot accordingly.

I dont know if its the demo or not but there is no ‘shutdown’ command that I could find. Overall it seems to run fairly well, it taxes the efika a bit, moving the slider in a file selection list will crank the cpu way high temporarily.

What I can run, runs very nicely at 1200x1024x24bit.

Booting the boot.img from USB takes a very very long time.
Booting the boot.img from TFTP takes seconds…

Id like to see how something like finalwriter ran.. if it could run… anyway…

Thursday, July 17, 2008

EFIKA Cross Compiler

These are some rough notes on building a powerpc cross compiler.

I have not yet worked out if AROS needs an powerpoc-eabi or powerpc-elf cross compiler, so I have build an -eabi version.

This set of notes should help you build a currently up to date when written gcc-4.3.0 cross compiler.

My host machine is an AMD64 Ubuntu 8.04 linux machine.  For Ubuntu users, make sure /bin/sh is symlinked to bash and not dash.

Pick a base directory ( I’m using ~/cross ) and pick an output prefix ( I’m using /opt/efika ).

You will need;

binutils-2.18
gcc-core-4.3.0
newlib-1.16.0
gdb-6.8
gmp-4.2.2
mpfr-2.3.1

Start with some basic setup

1 - untar all of them into a base directory,

Compile and build binutils

2 - mkdir build-binutils
3 - cd build-binutils
4 - ../binutils-2.18.0/configure --prefix=/opt/efika --target=powerpc-eabi --disable-nls
5 - echo “MAKEINFO = :” >> Makefile
6 - make
7 - sudo make install
8 - export PATH=$PATH:/opt/efika/bin

Step 5 works around a known bug in binutils 2.18 regarding makeinfo

Compile and build the bootstrap gcc
Optionally for AROS, I here apply the paramstack patch against gcc. (check aros/contrib/gnu/gcc for patches)

1 - cd gcc-4.3.0
2 - ln -s ../gmp-4.2.2 gmp
3 - ln -s ../mpfr-2.3.1 mpfr
4 - ln -s ../newlib-1.16.0 newlib
5 - cd ..
6 - mkdir build-gcc
7 - cd build_gcc
8 - ../gcc-4.3.0/configure --prefix=/opt/efika --target=powerpc-eabi --without-headers --with-newlib --with-gnu-as --with-gnu-ld --disable-nls
9 - make all-gcc
10 - sudo make install

Time to build newlib

1 - mkdir build-newlib
2 - ../newlib-1.16.0/configure --target=powerpc-eabi --prefix=/opt/efika --disable-nls
3 - echo “MAKEINFO = :” >> Makefile
4 - export PATH=/opt/efika/bin:$PATH
5 - make
6 - sudo make install

You can see the same bug here in newlib as was present in binutils.

With newlib installed you need to build the proper gcc (here I am targetting the 603e cpu as default)

1 - cd build-gcc
2 - rm -rf *
3 - rm ../gcc-4.3.0/newlib
4 - ../gcc-4.3.0/configure --target=powerpc-eabi --prefix=/opt/efika --with-newlib --with-gnu-as --with-gnu-ld --disable-nls --with-cpu=603e --enable-long-long
5 - echo “MAKEINFO = :” >> Makefile
6 - make all
7 - sudo make install

The “--with-gnu-as”, “--with-gnu-ld” helps the build process and stops it looking for a different linker/assembler.

The last step is to build the debugger

1 - mkdir build-gdb
2 - ../gdb-6.5/configure --prefix=/opt/efika --target=powerpc-eabi --disable-nls --enable-sim-powerpc --enable-sim-stdio
3 - make all
4 - sudo make install

You should now have a working cross compiler inside of /opt/efika, you may wish to go off and build some packages like glibc or anything else you may want.

Wednesday, July 16, 2008

Semi Assembled EFIKA

The last bits of the EFIKA arrived last night, so I coupled up the pico-psu, two leds (hard disk is a nice UV purple, power is green), two switches for reset/power.

Powered it up… mm leds were plugged in back to front, thats an easy fix.

The SmartFirmware was the latest version but, although it listed my USB key in devalias it would not list its contents. grrr. now I have to scrounge around for another usb key to see if it will work. Yay for null modem cables and usb serial adapters.

Some munging of minicom’s config got it to properly send and it all looks good.

I just really need to start making AROS happen

Tuesday, July 15, 2008

paramstack

I need to rebuild my cross compiler tonight, there is an important powerpc patch I was unaware of, that AROS relies on. It allows control / forces all parameters in gcc to be passed on the stack rather than in registers.

The opposite of __fastcall I guess. Tonight I begin the length process of rebuilding the cross compiler. I may again just try and not use crosstool and build binutils/gcc on my own.

Oh, the pico-psu came today, so I can actually power the efika up.

Right now, the most confusing thing is making heads and tails of the AROS build system. AROS generates and copies a lot of the things it needs, so when it says ‘foo is missing’, and you can clearly see foo in one of the base directories, its hard to know which build rule did/didnt run etc. 

Saturday, July 12, 2008

It is a _SMALL_ Step

Its a _very_ small step, but I got access to the AROS svn, and modified ‘configure.in’ to add an efika target.

Configure goes ok, and just for the heck of it, with no support code, I’ve told it to go off and ‘make’, hopefully this wont rebuild everything all over again and I can make a skeletonised arch/ppc-efika

mmm well it just died because something about sigcore.h

Well, as I said, its a very small step…

Thursday, July 10, 2008

AROS on the EFIKA

So I have this grandoise idea of trying to make AROS work on the efika, as the people who were working on it got busy with life and other things.

So, I have my efika board, all I need now is the PicoPSU to arrive (its on its way).

I spent last night fighting gcc cross compilations. In the end I used crosstool (which I dont like) to build a 603e based system. I originally intended to build by hand but kept running into issues building gcc core (binutils etc all built fine)..

Tonight I guess I will checkout AROS svn and poke around…

So, the plan is to boot efika via TFTP, monitor it with the null modem cable until it looks to be at a point where it is actually working and then move the setup to a real VGA screen.

What follows is randon noise and thought dumps;

Build cross compiler
Read up on powerpc arch (things I need to learn)
- BATS / MMU
- low level stuff
- AROS memory layout.

- Pull the elf boot file from tftp
- dump some prom/of info
- check the cpu setup?
- clear/setup the BATS/MMU
- relocate kernel?
- will I need a trampoline from prom/of to the system?
- pci tree probe

Need to read over aros documents. I’m assuming (still) like Amiga, AROS is still non nultitasking and unprotected.

I dont know how cloesly the efika OF is like ‘true’ OF. I know from a lot of posts that on the PegasosI/II it was very buggy. Ive also seen some bug reports on the efika version… I dont know how cloesly it follows this here.

At least freescale have some current docs online here

Looking over the documents, I’m guessing the efika does not have the BestComm UDMA binary firmware in the OF, and we will be stuck with PIO mode… Need to find this ‘bestcomm’ interface info…

Hmm Ethernet is the only thing that really requires the BestComm interface.. which is decsribed in the MPC5200BUM.pdf! nice, I was hoping it was not going to be a black hole.

PowerOff/Reboot/RealTimeClock require an RTAS implementation…

the BUM also has a nice memory map layout

Wednesday, July 09, 2008

Random thoughts

My efika board should show up today. In thinking about it vs my kurobox,

The Kurobox hg has a G2_LE (MPC82xx) at 266mhz and 128mb ram, the efika is a e300 core (MPC83xx) at 400mhz and 128mb ram. The biggest difference to me (speed aside) is that the efika has a fully working FPU, and a doubling in L1 caches.

Will be interesting to ‘feel’ the real world speed difference when compiling from my kurobox/hg to the efika.

Must setup a newer powerpc cross compiler toolchain on my box tonight.

I plan to work on porting AROS to it, so we will see how things go.